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1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 1 - htc sop-8 pkg ordering information device package LM5171d sop-8 features ? integrated power switch 1.5a guaranteed ? wide input voltage range 2.7v to 30v ? high frequency allows for small components ? minimum external components ? easy external synchronization ? frequency foldback reduces component stress during an overcurrent condition ? thermal shutdown with hysteresis ? shutdown current is 50 ua maximum ? wide ambient temperature range ? moisture sensitivity level 3 application ? lcd monitor/tv led backlight driver ? tft-lcd power management descripsion the LM5171 product is 280khz switching regulator with a high efficiency, 1.5a integrated switch. this part operates over a wide input voltage range, from 2.7v to 30v. the flexibility of the design allows the chip to operate in most power supply conf igurations, including boost, flyba ck, forward, inverting, and sepic. this ic utilizes current mode architecture, which allows excellent load and line regulation, as well as a practical means for limiting current. combining high frequency operatio n with a highly integrated regulator circuit results in an extremely compact power supply solution. the circui t design includes provisions for features such as frequency synchronization, shutdown, and feedback control. absolute maximum ratings rating symbol value unit junction temperature range t j -40 to 125 storage temperature range t stg -65 to 150 thermal resistance, junction to ambient r ja 165 /w thermal resistance, junction to case r jc 45 /w lead temperature (soldering, 10 sec) (note 1) - 230 note 1. 60 second maximum above 183c. * absolute maximum ratings indicate limits beyond which damage to the device may occur. maximum ratings applied to the device a re individual stress limit value and are not valid simultaneously. if the limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. ordering information package order no. description supply as status sop-8 LM5171d 1.5a, 280khz reel active
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 2 - htc absolute maximum ratings* pin name pin symbol v max v min i source i sink ic power input vcc 30 v - 0.3 v n / a 200 ma shutdown / sync ss 30 v - 0.3 v 1.0 ma 1.0 ma loop compensation vc 6.0 v - 0.3 v 10 ma 10 ma voltage feedback input fb 10 v - 0.3 v 1.0 ma 1.0 ma test pin test 6.0 v - 0.3 v 1.0 ma 1.0 ma power ground pgnd 0.3 v - 0.3 v 4.0 a 1.0 ma analog ground agnd 0 v 0 v n / a 10 ma switch input vsw 40 v - 0.3 v 10 ma 3.0 a * operating ratings indicate conditions for which the device is intended to be but do not guarantee specific performance limits . for guaranteed specifications, see the elec trical characteristics.) block diagram r oscillator thermal shutdown frequency shift 5:1 2.0v regulator delay timer sync driver 0.4v detector 63m shutdown error amp 1.276v pwm comparator - + - + sq switch x 5 ramp summer v cc ss test fb agnd v sw pgnd v c
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 3 - htc pin configuration v c fb test ss v sw pgnd agnd v cc 1 2 3 4 8 7 6 5 sop-8 pkg pin description pin no. pin name pin function 1 v c loop compensation pin. the vc pin is the output of the error amplifier and is used for loop compensation and current limit. loop compensation can be implemented by a simple rc network as shown in the application circuit on page 4 as r1 and c1. 2 fb feedback pin. this pin senses an output vo ltage and is referenced to 1.276v. when the voltage at this pin falls below 0.4v, chip switching frequency reduces to 20% of the nominal frequency. 3 test this pin is connected to internal test logic and should either be left floating or be used in soft start circuit. connection to a voltage betw een 9.5 v and 15 v shuts down the internal oscillator and leaves the power switch running. 4 ss synchronization and shutdown pin. this pin ma y be used to synchronize the part to nearly twice the base frequency. a ttl low will shut the part down and put it into low current mode. if synchronization is not used, this pin should be either tied high or left floating for normal operation. 5 v cc input power supply pin. this pin supplies power to the part and should have a bypass capacitor connected to agnd. 6 agnd analog ground. this pin provides a clean ground for the controller circuitry and should not be in the path of large currents. the output voltage sensing resistors should be connected to this ground pin. this pin is connected to the ic substrate. 7 pgnd power ground. this pin is the ground connec tion for the emitter of the power switching transistor. connection to a good ground plane is essential. 8 v sw high current switch pin. this pin connects inte rnally to the collector of the power switch. the open voltage across the power switch can be as high as 40 v. to minimize radiation, use a trace as short as practical.
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 4 - htc application circuit r2 3.72k r3 1.28k r1 5k c3 22uf mbrs120t3 c2 22uf c1 0.01uf 22uh ss 3.3v v c fb test ss v sw pgnd agnd v cc 1 2 3 4 8 7 6 5 l1 d1 vout 5v + + electrical characteristics 2.7v < vcc < 30 v, 0c < t j < 125c, unless otherwise stated. characteristics test condition min typ max unit error amplifier fb reference voltage vc tied to fb : measure at fb 1.246 1.276 1.300 v fb input current fb = v ref -1.0 0.1 1.0 ua fb reference voltage line regulation vc = fb - 0.01 0.03 %/v error amp transconductance ivc = 25 ua 300 550 800 umho error amp gain (note 2) 200 500 - v/ v vc source current fb = 1.0v, vc = 1.25v 25 50 90 ua vc sink current fb = 1.5v, vc = 1.25v 200 625 1500 ua vc high clamp voltage fb = 1.0v, vc sources 25ua 1.5 1.7 1.9 v vc low clamp voltage fb = 1.5v , vc sinks 25ua 0.25 0.50 0.65 v vc threshold reduce vc from 1.5v until switching stops 200 625 1500 ua oscillator base operating frequency fb = 1v 230 280 310 khz reduced operating frequency fb = 0v 30 52 120 khz maximum duty cycle 90 94 - % fb frequency shift threshold frequency drops to reduced operating frequency 0.36 0.40 0.44 v
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 5 - htc electrical characteristics (continued) 2.7v < vcc < 30 v, 0c < t j < 125c, unless otherwise stated. characteristics test condition min typ max unit sync / shutdown sync range 320 - 500 khz sync pulse transition threshold rise time = 20 ns 2.5 - - v ss = 0v -15 -3 - ss bias current ss = 3.0v - 3 8 ua shutdown threshold 0.50 0.85 1.20 v 2.7v vcc 12v 12 80 350 us shutdown delay 12v vcc 30v 12 36 200 us power switch i switch = 1.5a (note 2) - 0.8 1.4 v i switch = 1.0a, 0 c t a 70 c - 0.55 1.00 v switch saturation voltage i switch = 10ma - 0.09 0.45 v 50% duty cycle (note 2) 1.6 1.9 2.4 a switch current limit 80% duty cycle (note 2) 1.5 1.7 2.2 a minimum pulse width fb = 0v, isw = 4.0a (note 2) 200 250 300 ns 2.7v v cc 12v, 10ma isw 1.0a - 10 30 ma/a 12v v cc 30v, 10ma isw 1.0a - - 100 ma/a 2.7v v cc 12v,10ma isw 1.5a (note2) - 17 30 ma/a ? icc/ ? ivsw 12v v cc 30v, 10ma isw 1.5a (note2) - - 100 ma/a switch leakage vsw = 40v, vcc = 0v - 2.0 100 ua general operating current isw = 0 - 5.5 8 ma vc < 0.8v, ss = 0v, 2.7v vcc 12v - 12 60 ua shutdown mode current vc < 0.8v, ss = 0v, 12v vcc 30v - - 100 ua minimum operating input voltage vsw switching, maximum isw = 10ma - 2.45 2.70 v thermal shutdown (note 2) 150 180 210 c thermal hysteresis (note 2) - 25 - c note 2. guaranteed by design, not 100% tested in production.
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 6 - htc typical performanc e charcteristics figure 3. i cc (no switching) vs. temperature figure 4. ? icc/ ? ivsw vs. temperature figure 5. v ce(sat) vs. i sw figure 6. minimum input voltage vs. temperature figure 7. switching frequency vs. temperature figure 8. switching frequency vs. v fb figure 9. current limit vs. temperature figure 10. maximum duty cycle vs. temperature v cc = 12v
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 7 - htc typical performanc e charcteristics (continued) figure 11. vc threshold and high clamp figure 12. shutdown threshold vs. temperature voltage vs. temperature figure 13. shutdown delay vs. temperature figure 14. i ss vs v ss figure 15. i cc vs. v in during shutdwon figure 16. error amplifier transconductance vs. temperature figure 17. switch leakage vs. temperature figure 18. error amplifier i out vs. v fb
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 8 - htc application information current mode control oscillator 63m r load mbrs120t3 c 0 l power switch x 5 v c s r q pwm comparator - + v in d1 v sw figure 19. current mode controle scheme the LM5171 is a current mode control scheme, in whic h the pwm ramp signal is derived from the power switch current. this ramp signal is compared to the output of the error amplifier to control the on-time of the power switch. the oscillator is used as a fixed-frequen cy clock to ensure a constant operational frequency. the resulting control scheme features several advantag es over conventional voltage mode control. first, derived directly from the inductor, the ramp signal responds immediately to line voltage changes. this eliminates the delay caused by the out put filter and error amplifier, which is commonly found in voltage mode controllers. the second benefit comes from inherent pulse ? by ? pulse current limiting by merely clamping the peak switching current. finally, since current mode command s an output current rather than voltage, the filter offers only a single pole to the feedback loop. this allows both a simpler compensation and a higher gain ? bandwidth over a comparable voltage mode circuit. without discrediting its apparent merits, current mode c ontrol comes with its own peculiar problems, mainly, sub harmonic oscillation at duty cycl es over 50%. the LM5171 solves this problem by adopting a slope compensation scheme in which a fix ed ramp generated by the oscillator is added to the current ramp. a proper slope rate is provided to improve circuit stability wi thout sacrificing the advantag es of current mode control. oscillator and shutdown figure 20. timing diagram of sync and shutdown
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 9 - htc the oscillator is trimmed to guarantee 18% frequency ac curacy. the output of the oscillator turns on the power switch at a frequency of 280 khz. the power switch is turned off by the output of the pwm comparator. a ttl ? compatible sync input at the ss pin is capable of sy ncing up to 1.8 times the base oscillator frequency. as shown in figure 20, in order to sync to a higher frequency, a positive transition turns on the power switch before the output of the oscillator goes high, thereby rese tting the oscillator. the sync operation allows multiple power supplies to operate at the same frequency. a sustained logic low at the ss pin will shut down the ic and reduce the supply current. an additional feature includes frequency shift to 20% of the nominal frequency when the fb pin trigger the threshold. during power up, overload, or shor t circuit conditions, the minimum switch on ? time is limited by the pwm comparator minimum pulse width. extra switch off ? time reduces the minimum duty cycle to protect external components and the ic itself. as previously mentioned, this block also produces a ramp for the slope compensation to improve regulator stability. error amplifier - + 1m 120pf voltage clamp c1 0.01uf r1 5k 1.276v LM5171 v c error amp fb figure 21. error amplifier equivalent circuit the fb pin is directly connected to the inverting input of the positive error amplifier, whose non ? inverting input is fed by the 1.276 v reference. the amplifier is transc onductance amplifiers with a high output impedance of approximately 1 m ? , as shown in figure 21. the v c pin is connected to the output of the error amplifiers and is internally clamped between 0.5 v and 1.7 v. a typical connection at the v c pin includes a capacitor in series with a resistor to ground, forming a pole/zero for loop compensation. an external shunt can be connected between the v c pin and ground to reduce its clamp voltage. consequently, the current limit of the internal power tr ansistor current is reduced from its nominal value. switch driver and power switch the switch driver receives a control signal from the logic section to drive the output power switch. the switch is grounded through emitter resistors (63m ? total) to the pgnd pin. pgnd is not connected to the ic substrate so that switching noise can be isolated from the analog ground. the peak switching current is clamped by an internal circuit. the clamp current is guaranteed to be greater than 1.5a and varies with duty cycle due to slope compensation. the power switch can withstand a maximum voltage of 40 v on the collector (v sw pin). the saturation voltage of the switch is typica lly less than 1v to minimize power dissipation.
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 10 - htc short circuit condition when a short circuit condition happens in a boost circui t, the inductor current will increase during the whole switching cycle, causing excessive current to be drawn from the input power supply. since control ics don?t have the means to limit load current, an external current limit circuit (such as a fuse or relay) has to be implemented to protect the load, power supply and ics. in other topologies, the frequency shift built into the ic prevents damage to the chip and external components. this feature reduces the minimum du ty cycle and allows the transformer secondary to absorb excess energy before the switch turns back on. figure22. startup waveforms of circuit shown in the application circuit. load = 400ma the LM5171 can be activated by either connecting the v cc pin to a voltage source or by enabling the ss pin. startup waveforms shown in figure 22 are measured in the boost converter demonstrated in the application circuit on the page 4 of this document. recorded after the input voltage is turned on, this waveform shows the various phases during the power up transition. when the v cc voltage is below the minimum supply voltage, the v sw pin is in high impedance. therefore, current conducts directly from the input power source to the output through the inductor and diode. once v cc reaches approximately 1.5v, the internal power switch br iefly turns on. this is a part of the LM5171 normal operation. the turn ? on of the power switch accounts fo r the initial current swing. when the v c pin voltage rises above the threshold, the internal power switch starts to switch and a voltage pulse can be seen at the v sw pin. detecting a low output voltage at the fb pin, the built ? in frequency shift feature reduces the switching frequency to a fraction of its nominal value, reducing the minimum duty cycle, which is otherwise limited by the minimum on ? time of the switch. the peak current during this phase is clamped by the internal current limit. when the fb pin voltage rises above 0.4v, the frequency increases to its nominal value, and the peak current begins to decrease as the output appr oaches the regulation voltage. the overshoot of the output voltage is prevented by the active pull ? on, by which the sink current of the error amplifier is increased once an overvoltage condition is detected. the overvoltage c ondition is defined as when the fb pin voltage is 50mv greater than the reference voltage.
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 11 - htc component selection frequency compensation the goal of frequency compensation is to achieve des irable transient response and dc regulation while ensuring the stability of the system. a typical compensation network, as shown in figure 23, provides a frequency response of two poles and one zero. this frequen cy response is further illustrated in the bode plot shown in figure 24. c2 c1 r1 v c agnd LM5171 figure 23. a typical compensation network the high dc gain in figure 24 is desirable for achieving dc accuracy over line and load variations. the dc gain of a transconductance error amplif ier can be calculated as follows: o m dc r g = gain where: g m = error amplifier transconductance; r o = error amplifier output resistance 1 m ? . the low frequency pole, f p1 , is determined by the error amplifier output resistance and c1 as: o p1 c1r 2 1 = f the first zero generated by c1 and r1 is: c1r1 2 1 = f z1 the phase lead provided by this zero ensures that the loop has at least a 45 phase margin at the crossover frequency. therefore, this zero should be placed clos e to the pole generated in the power stage which can be identified at frequency: load o p r c 2 1 = f where: c o = equivalent output capacitance of the error amplifier 120pf; r load = load resistance.
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 12 - htc the high frequency pole, f p2 , can be placed at the output filter?s esr zero or at half the switching frequency. placing the pole at this frequency will cut down on switch ing noise. the frequency of this pole is determined by the value of c2 and r1: c2r1 2 1 = f p2 one simple method to ensure adequate phase margin is to design the frequency response with a ? 20db per decade slope, until unity ? gain crossover. the crossover frequency should be selected at the midpoint between f z1 and f p2 where the phase margin is maximized. figure 24. bode plot of the compensation network shown in figure 23. v sw voltage limit in the boost topology, v sw pin maximum voltage is set by the maximum output voltage plus the output diode forward voltage. the diode forward voltage is typica lly 0.5v for schottky diodes and 0.8v for ultra fast recovery diodes v sw(max) = v out(max) + v f where: v f = output diode forward voltage. in the flyback topology, peak v sw voltage is governed by: v sw(max) = v cc(max) + (v out + v f ) n where: n = transformer turns ratio, primary over secondary. when the power switch turns o ff, there exists a voltage spike su perimposed on top of the steady ? state voltage. usually this voltage spike is caused by trans former leakage inductance charging stray capacitance between the v sw and pgnd pins. to prevent the voltage at the v sw pin from exceeding the maximum rating, a transient voltage suppressor in series with a diode is paralleled with the primary windings. another method of clamping switch voltage is to connec t a transient voltage suppressor between the v sw pin and ground. frequency (log) gain (db)
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 13 - htc magnetic component selection when choosing a magnetic component, one must consider factors such as peak current, core and ferrite material, output voltage ripple, emi, temperature range, phy sical size and cost. in boost circuits, the average inductor current is t he product of output current and voltage gain (v out /v cc ), assuming 100% energy transfer efficiency. in continuous conduction mode, inductor ripple current is ) (f)(l)(v ) v - (v v = i out cc out cc ripple where: f = 280 khz the peak inductor current is equal to average current plus half of the ripple current, which should not cause inductor saturation. the above equation can also be re ferenced when selecting the value of the inductor based on the tolerance of the ripple current in the circuits. small ripple current provides the benefits of small input capacitors and greater output current capability. a co re geometry like a rod or barrel is prone to generating high magnetic field radiation, but is relatively cheap and sm all. other core geometries, such as toroids, provide a closed magnetic loop to prevent emi. input capacitor selection in boost circuits, the inductor becomes part of the input f ilter, as shown in figure 26. in continuous mode, the input current waveform is triangular and does not contai n a large pulsed current, as shown in figure 25. this reduces the requirements imposed on the input capacitor selection. during cont inuous conduction mode, the peak to peak inductor ripple current is given in the previ ous section. as we can see from figure 25, the product of the inductor current ripple and the input capacitor? s effective series resistance (esr) determine the v cc ripple. in most applications, input capacitors in the range of 10f to 100 f with an esr less than 0.3 ? work well up to a full 1.5a switch current. c in r esr + - v in i in i l figure 25. boost input voltage and current ripple figure 26. boost circuit effective input filter waveforms the situation is different in a flyback circuit. the input current is discontinuous and a significant pulsed current is seen by the input capacitors. therefore, there are two requirements for capacitors in a flyback regulator: energy storage and filtering. to maintain a stable voltage supply to the chip, a storage capacitor larger than 20 f with low esr is required. to redu ce the noise generated by t he inductor, insert a 1.0f ceramic capacitor between v cc and ground as close as possible to the chip. by examining the waveforms shown in figure 27, we can see that the out put voltage ripple comes from two
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 14 - htc major sources, namely capacitor esr and the charging/disc harging of the output capacitor. in boost circuits, when the power switch turns off, i l flows into the output capacitor causing an instant v = i in esr. at the same time, current i l ? i out charges the capacitor and increas es the output voltage gradually. figure 27. typical output voltage ripple esr i + )(f) (c d i + )(f) (c d) - )(1 i - (i v in out out out out in = ) out(ripple the equation can be expressed more conveniently in terms of v cc , v out and i out for design purposes as follows : cc out out out out cc out out ) out(ripple v )(esr) )(v (i + )(f) (c 1 )(f) (c ) -v (v i = v the capacitor rms ripple current is : cc cc out out 2 out 2 out in ripple v v - v i = (d) ) (i + d) - (1 ) i - (i = i although the above equations apply only for boost circuits, similar equations can be derived for flyback circuits. reducing the current limit in some applications, the designer may prefer a lower lim it on the switch current than 1.5a. an external shunt can be connected between the v c pin and ground to reduce its clamp voltage. consequently, the current limit of the internal power transistor current is reduced from its nominal value. the voltage on the v c pin can be evaluated with the equation v c = i sw r e a v where: r e =63m ? , the value of the internal emitter resistor; a v =5v/v, the gain of the current sense amplifier. since r e and a v cannot be changed by the end user, the only available method for limiting switch current below 1.5a is to clamp the v c pin at a lower voltage. if the maximum switch or inductor current is substituted into the equation above, the desired clamp voltage will result. a simple diode clamp, as shown in figure 28 clamps the v c voltage to a diode drop above the voltage on resistor r3. unfortunately, such a simp le circuit is not generally acceptable if v in is loosely regulated. vout ripple i l
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 15 - htc v cc v c c1 c2 r1 r2 r3 d1 v in figure 28. current limiting using a diode clamp another solution to the current limiting problem is to ex ternally measure the current through the switch using a sense resistor. such a circuit is illustrated in figure 29. c1 c2 r1 v cc pgnd agnd v c r sense r2 c3 + - q1 v in output ground figure 29. current limiting using a current sense resistor the switch current is limited to sense be(q1) k) switch(pea r v = i where: v be(q1) =the base-emitter voltage drop of q1, typically 0.65v. the improved circuit does not require a regulated voltage to operate properly. unfortunately, a price must be paid for this convenience in the overall efficiency of the circuit. the designer should note that the input and output grounds are no longer common. also, t he addition of the current sense resistor, r sence , results in a considerable power loss which increases with the duty cycle. resistor r2 and capacitor c3 form a low-pass filter to remove noise.
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 16 - htc subharmonic oscillation subharmonic oscillation (shm) is a problem found in cu rrent-mode control systems, where instability results when duty cycle exceeds 50%. shm only occurs in swit ching regulators with a cont inuous inductor current. this instability is not harmful to the converter and usua lly does not affect the output voltage regulation. shm will increase the radiated em noise from the converter and can cause, under certain circumstances, the inductor to emit high-frequency audible noise. shm is an easily remedied problem. the rising slope of the inductor current is supplemented with internal ?slope compensation? to prevent any dut y cycle instability from carrying throu gh to the next switching cycle. in the LM5171, slope compensation is added during the entir e switch on-time, typically in the amount of 180ma/ s. in some cases, shm can rear its ugly head despite the presence of the onboard slope compensation. the simple cure to this problem is more slope compensation to avoid the unwanted oscillation. in that case, an external circuit, shown in figure 30, can be added to incr ease the amount of slope compensation used. this circuit requires only a few components and is ?tacked on? to the compensation network. v sw v c c1 c2 r1 r2 r3 c3 v sw figure 30. technique for increasing slope compensation the dashed box contains the normal compensation circ uitry to limit the bandwidth of the error amplifier. resistors r2 and r3 form a voltage divider off of the v sw pin. in normal operation, v sw looks similar to a square wave, and is dependent on the converter topology. formulas for calculating v sw in the boost and flyback topologies are given in the section ?v sw voltage limit.? the voltage on v sw charges capacitor c3 when the switch is off, causing the voltage at the v c pin to shift upwards. when the switch turns on, c3 discharges through r3, producing a negative slope at the v c pin. this negative slope provides the slope compensation. the amount of slope compensation added by this circuit is ) a d)r - (1 f )( e - )(1 r + r r ( v = t i v e sw f c r d) - -(1 3 2 3 sw sw 3 3 where: i/ t = the amount of slope compensation added (a/s); v sw = the voltage at the switch node when the transistor is turned off (v); f sw = the switching frequency, typically 280 khz; d = the duty cycle; r e = 63m ? , the value of the internal emitter resistor; a v = 5v/v, the gain of the current sense amplifier.
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 17 - htc in selecting appropriate values for the slope compensat ion network, the designer is advised to choose a convenient capacitor, then select values for r2 and r3 such that the amount of slope compensation added is 100 ma/ s. then r2 may be increased or decreased as necessar y. of course, the series combination of r2 and r3 should be large enough to avoid drawing excessive current from v sw . additionally, to ensure that the control loop stability is improved, the time constant formed by the additional components should be chosen such that sw 3 3 f d - 1 < c r finally, it is worth mentioning that the added slope compensation is a trade-off between duty cycle stability and transient response. the mo re slope compensation a designer adds, t he slower the transient response will be, due to the external circuitry interfering with the proper operation of the error amplifier. soft ? start through the addition of an external circuit, a soft ? start function can be added to the LM5171. soft ? start circuitry prevents the v c pin from slamming high during startup, thereby inhibiting the inductor current from rising at a high slope. this circuit, shown in figure 31, requires a mi nimum number of components and allows the soft ? start circuitry to activate any time the ss pin is used to restart the converter. c1 c2 r1 d1 c3 ss ss v cc q test v in test v c 4ua figure 31. soft-start resistor r1 and capacitors c1 and c2 form the com pensation network. at turn on, the voltage at the v c pin starts to come up, charging capacitor c3 thro ugh transistor q, clamping the voltage at the v c pin such that switching begins when v c reaches the v c threshold, typically 1.05v therefore, c3 slows the startup of t he circuit by limiting the voltage on the v c pin. the soft ? start time increases with the size of c3. diode d1 discharges c3 when ss is low. if the shutdo wn function is not used with this part, the cathode of d1 should be connected to v in . calculating junction temperature to ensure safe operation of the LM5171, the designer must calculate the on ? chip power dissipation and determine its expected junction temperatur e. internal thermal protection circ uitry will turn the part off once the
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 18 - htc junction temperature exceeds 180c30. however, repeat ed operation at such high temperatures will ensure a reduced operating life. calculation of the junction temperature is an imprecis e but simple task. first, the power losses must be quantified. there are three major so urces of power loss on the LM5171: ? biasing of internal control circuitry, p bias ? switch driver, p driver ? switch saturation, p sat the internal control circuitry, including the oscillator and linear regulator, requires a small amount of power even when the switch is turned off. the specifications section of this datash eet reveals that t he typical operating current, i q , due to this circuitry is 5.5ma. additional guida nce can be found in the graph of operating current vs. temperature. this graph shows that i q is strongly dependent on input voltage, v in , and temperature. then p bias = v in i q since the onboard switch is an npn transistor, the base drive current must be factored in as well. this current is drawn from the v in pin, in addition to the control circuitry curr ent. the base drive current is listed in the specifications as i cc / i sw , or switch transconductance. as before, the designer will find additional guidance in the graphs. with that information, the designer can calculate d i i i v = p sw cc sw in driver where: i sw = the current through the switch; d = the duty cycle or percentage of switch on ? time. i sw and d are dependent on the type of conv erter. in a boost converter, efficiency 1 d i i load sw(avg) out in out v v - v d in a flyback converter, efficiency 1 v i v i in iload out sw(avg) in p s out out v n n + v v d the switch saturation voltage, v (ce)sat , is the last major source of on ? chip power loss. v (ce)sat is the collector ? emitter voltage of the internal npn transistor when it is driven into saturation by its base drive current. the value for v (ce)sat can be obtained from the specifications or from the graphs, as ?switch saturation voltage.? thus, p sat = v (ce)sat i sw * d
1.5a, 280khz, boost regulator LM5171 dec. 2010 - rev. 1.2.1 - 19 - htc finally, the total on ? chip power losses are p d = p bias + p driver + p sat power dissipation in a semiconductor device results in the generation of heat in the junctions at the surface of the chip. this heat is transferred to the surface of the ic package, but a thermal gradient exists due to the resistive properties of the package mo lding compound. the magnitude of the thermal gradient is expressed in manufacturers? data sheets as ja , or junction ? to ? ambient thermal resistance. the on ? chip junction temperature can be calculated if ja , the air temperature near the surface of the ic, and the on ? chip power dissipation are known. t j = t a + (p d ? ja ) where: t j = ic or fet junction temperature (c); t a = ambient temperature (c); p d = power dissipated by part in question (w); ja = junction?to?ambient thermal re sistance (c/w). for the LM5171 ja =165c/w. once the designer has calculated t j , the question of whether the lm517 1 can be used in an application is settled. if t j exceeds 150 c, the absolute maximum allowable juncti on temperature, the LM5171 is not suitable for that application. if t j approaches 150 c, the designer should consider possible means of reducing the junction temperature. perhaps another converter topology could be selected to reduce the switch current. increasing the airflow across the surface of the chip might be considered to reduce t a . circuit layout guidelines in any switching power supply, circuit layout is very important for proper operation. rapidly switching currents combined with trace inductance generates voltage transiti ons that can cause problems. therefore the following guidelines should be followed in the layout. 1. in boost circuits, high ac current circulates with in the loop composed of the diode, output capacitor, and on ? chip power transistor. the length of associated tr aces and leads should be kept as short as possible. in the flyback circuit, high ac current loops exist on bot h sides of the transformer. on the primary side, the loop consists of the input capacitor, transformer, and on ? chip power transistor, while the transformer, rectifier diodes, and output capacitors form another loop on the secondary side. just as in the boost circuit, all traces and leads containing large ac currents should be kept short. 2. separate the low current signal grounds from th e power grounds. use single point grounding or ground plane construction for the best results. 3. locate the voltage feedback resistors as near the ic as possible to keep the sensitive f eedback wiring short. connect feedback resistors to the low current analog ground.

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